STMicroelectronics (NYSE: STM) has announced a comprehensive program to reshape its global manufacturing footprint and optimize its cost base focuses on advancing manufacturing infrastructure in 300mm silicon and 200mm silicon carbide technologies Key initiatives include:Scaling up Agrate (Italy) 300mm fab capacity to 4,000 wafers per week by 2027 with potential expansion to 14,000 wpwIncreasing Crolles (France) 300mm fab capacity to 14,000 wpw by 2027 expandable to 20,000 wpwLaunching 200mm silicon carbide production in Catania by Q4 2025Implementing workforce changes affecting up to 2,800 positions globally through voluntary measures The company aims to achieve annual cost savings in the high triple-digit million-dollar range by the end of 2027 while strengthening its position in advanced manufacturing and R&D in Europe STMicroelectronics (NYSE: STM) ha annunciato un programma completo per rimodellare la sua presenza produttiva globale e ottimizzare la propria base di costi si concentra sul miglioramento delle infrastrutture di produzione nelle tecnologie del silicio da 300 mm e del carburo di silicio da 200 mm Le iniziative chiave includono:Aumentare la capacità dello stabilimento da 300 mm di Agrate (Italia) a 4.000 wafer a settimana entro il 2027 con potenziale espansione a 14.000 wpwAumentare la capacità dello stabilimento da 300 mm di Crolles (Francia) a 14.000 wpw entro il 2027 espandibile a 20.000 wpwAvviare la produzione di carburo di silicio da 200 mm a Catania entro il quarto trimestre del 2025Implementare cambiamenti nel personale che interessano fino a 2.800 posizioni a livello globale attraverso misure volontarie L'azienda punta a conseguire risparmi annuali sui costi nell'ordine di centinaia di milioni di dollari entro la fine del 2027 rafforzando al contempo la propria posizione nella produzione avanzata e nella ricerca e sviluppo in Europa STMicroelectronics (NYSE: STM) ha anunciado un programa integral para remodelar su huella de fabricación global y optimizar su base de costos que abarca desde el ejercicio fiscal 2025 hasta 2027 se centra en avanzar en la infraestructura de fabricación en tecnologías de silicio de 300 mm y carburo de silicio de 200 mm Las iniciativas clave incluyen:Aumentar la capacidad de la fábrica de 300 mm en Agrate (Italia) a 4,000 obleas por semana para 2027 con una posible expansión a 14,000 obleas por semanaAumentar la capacidad de la fábrica de 300 mm en Crolles (Francia) a 14,000 obleas por semana para 2027 ampliable a 20,000 obleas por semanaLanzar la producción de carburo de silicio de 200 mm en Catania para el cuarto trimestre de 2025Implementar cambios en la fuerza laboral que afecten hasta 2,800 puestos a nivel global a través de medidas voluntarias La empresa tiene como objetivo lograr ahorros anuales en costos en el rango de cientos de millones de dólares para finales de 2027 mientras fortalece su posición en la fabricación avanzada y la I+D en Europa STMicroelectronics (NYSE: STM)는 글로벌 제조 발자국을 재편하고 비용 기반을 최적화하기 위한 포괄적인 프로그램을 발표했습니다 300mm 실리콘 및 200mm 실리콘 카바이드 기술의 제조 인프라를 발전시키는 데 중점을 둡니다 주요 이니셔티브는 다음과 같습니다:Agrate (이탈리아)의 300mm 팹 용량을 2027년까지 주당 4,000 웨이퍼로 확대하고 최대 14,000 웨이퍼로 확장 가능성Crolles (프랑스)의 300mm 팹 용량을 2027년까지 주당 14,000 웨이퍼로 늘리고 20,000 웨이퍼로 확장 가능2025년 4분기까지 카타니아에서 200mm 실리콘 카바이드 생산 시작자발적 조치를 통해 전 세계적으로 최대 2,800개의 직무에 영향을 미치는 인력 변화 구현 유럽에서의 고급 제조 및 연구개발 분야의 입지를 강화하는 것을 목표로 하고 있습니다 STMicroelectronics (NYSE: STM) a annoncé un programme complet pour remodeler son empreinte de fabrication mondiale et optimiser sa base de coûts se concentre sur l'avancement des infrastructures de fabrication dans les technologies de silicium de 300 mm et de carbure de silicium de 200 mm Les initiatives clés comprennent:Augmenter la capacité de l'usine de 300 mm à Agrate (Italie) à 4 000 wafers par semaine d'ici 2027 avec une expansion potentielle à 14 000 wafers par semaineAugmenter la capacité de l'usine de 300 mm à Crolles (France) à 14 000 wafers par semaine d'ici 2027 extensible à 20 000 wafers par semaineLancer la production de carbure de silicium de 200 mm à Catane d'ici le quatrième trimestre 2025Mettre en œuvre des changements de personnel affectant jusqu'à 2 800 postes dans le monde grâce à des mesures volontaires L'entreprise vise à réaliser des économies annuelles de coûts dans la fourchette des centaines de millions de dollars d'ici la fin de 2027 tout en renforçant sa position dans la fabrication avancée et la R&D en Europe STMicroelectronics (NYSE: STM) hat ein umfassendes Programm angekündigt um seine globale Fertigungsstruktur neu zu gestalten und seine Kostenbasis zu optimieren der sich über die Geschäftsjahre 2025 bis 2027 erstreckt konzentriert sich auf den Ausbau der Fertigungsinfrastruktur in 300-mm-Silizium- und 200-mm-Siliziumkarbid-Technologien Wichtige Initiativen umfassen:Die Kapazität des 300-mm-Werks in Agrate (Italien) bis 2027 auf 4.000 Wafer pro Woche zu erhöhen mit der Möglichkeit einer Erweiterung auf 14.000 Wafer pro WocheDie Kapazität des 300-mm-Werks in Crolles (Frankreich) bis 2027 auf 14.000 Wafer pro Woche zu erhöhen erweiterbar auf 20.000 Wafer pro WocheDie Produktion von 200-mm-Siliziumkarbid in Catania bis zum vierten Quartal 2025 zu startenÄnderungen des Personals die bis zu 2.800 Stellen weltweit durch freiwillige Maßnahmen betreffen bis Ende 2027 jährliche Kosteneinsparungen im hohen dreistelligen Millionen-Dollar-Bereich zu erzielen und gleichzeitig seine Position in der fortschrittlichen Fertigung und F&E in Europa zu stärken STMicroelectronics has unveiled a significant restructuring program aimed at reshaping its manufacturing footprint while targeting high triple-digit million-dollar annual cost savings by 2027 The program includes reducing its workforce by up to 2,800 employees (approximately 5.6% of its 50,000 workforce) through voluntary measures over three years The strategic repositioning focuses on two critical areas: (1) prioritizing investments in advanced 300mm silicon and 200mm silicon carbide wafer fabrication and (2) maximizing efficiency of legacy 150mm and mature 200mm capabilities This represents a necessary modernization of manufacturing assets to maintain competitive positioning in the global semiconductor market The company is creating specialized manufacturing ecosystems - digital technologies in France Key initiatives include doubling capacity at Italy's Agrate 300mm fab to 4,000 wafers per week by 2027 (expandable to 14,000) increasing France's Crolles 300mm capacity to 14,000 wafers weekly (expandable to 20,000) and building a new Silicon Carbide Campus in Catania starting production in Q4 2025 While the workforce reduction signals short-term challenges the voluntary implementation approach and three-year timeline suggest a measured transition rather than urgent cost-cutting The substantial cost savings target represents approximately 3-6% of annual revenue which could meaningfully improve profitability once fully implemented STMicroelectronics details company-wide program to reshape manufacturing footprint and resize global cost base a global semiconductor leader serving customers across the spectrum of electronics applications today disclosed further elements of its program to reshape its global manufacturing footprint This comes as part of the program announced in October 2024 to further strengthen ST’s competitiveness solidify its position as a global semiconductor leader and ensure the long-term sustainability of its model as an Integrated Device Manufacturer by leveraging strategic assets globally across technology R&D President and CEO of STMicroelectronics said: “The reshaping of our manufacturing footprint announced today will future proof our Integrated Device Manufacturer model with strategic assets in Europe and improve our ability to innovate even faster As we focus on advanced manufacturing infrastructure and mainstream technologies we will continue to leverage all of our existing sites and bring redefined missions for some of them to support their long-term success We are committed to managing this program responsibly and exclusively through voluntary measures and high-volume manufacturing activities in Italy and France will continue to be central to our global operations and will be reinforced via planned investments in mainstream technologies” Innovating and scaling up to increase efficiency across manufacturing operations ST’s manufacturing strategy is evolving to accelerate the delivery of innovative proprietary technologies and products at scale to customers globally personal electronics and communication infrastructure applications The reshaping and modernization of ST’s manufacturing operations aim to achieve two main objectives: prioritizing planned investments towards future-ready infrastructure such as 300mm silicon and 200mm silicon carbide wafer fabs to enable them to reach a critical scale and maximizing the productivity and efficiency of legacy 150mm capabilities and mature 200mm capabilities ST plans to continue to invest in upgrading the technology used across its operations deploying additional AI and automation for additional efficiency in technology R&D Strengthening ST’s manufacturing ecosystem the reshaping of ST’s manufacturing footprint will design and strengthen ST’s complementary ecosystems: in France around digital technologies in Italy around analog and power technologies and in Singapore on mature technologies The optimization of these operations aim to achieve full capacity utilization and drive technological differentiation to compete globally each of ST’s current sites will continue to play a long-term role within the company’s global operations Building 300mm silicon megafabs in Agrate and Crolles The Agrate (Italy) 300mm fab will continue to be scaled up with the aim to become ST’s flagship high-volume manufacturing facility for smart power and mixed signal technologies The plan is to double its current capacity to 4,000 wafers per week (wpw) by 2027 with planned modular expansions increasing capacity up to 14,000 wpw As we increase our focus on 300mm manufacturing the Agrate 200mm fab will refocus on MEMS.The Crolles (France) 300mm fab will be further cemented as the core of ST’s digital products ecosystem The plan is to increase capacity to 14,000 wpw by 2027 with planned modular expansions increasing capacity up to 20,000 wpw we will convert the Crolles 200mm fab to support Electrical Wafer Sorting high volume manufacturing and advanced packaging technologies hosting activities that do not exist today in Europe The focus will be on next-generation leading technologies including optical sensing and silicon photonics Specialized Manufacturing and Competence Center for Power Electronics in Catania Catania will continue to serve as a center of excellence for power and wide-bandgap semiconductor devices The development of the new Silicon Carbide Campus is progressing as planned with production of 200mm wafers set to begin in Q4 2025 reinforcing ST’s leadership in next-generation power technologies Our resources supporting Catania’s current 150mm and EWS capabilities will be refocused on 200mm silicon carbide and silicon power semiconductor production Rousset (France) will remain focused on 200mm manufacturing with additional volumes reallocated from other sites enabling full saturation of existing manufacturing capacity for optimized efficiency Tours (France) will remain focused on its 200mm silicon production line for select technologies while other activities - including legacy 150mm manufacturing activities - will be transferred to different ST sites and it will also remain a center of competence for GaN The Tours site will also host a new activity: panel-level-packaging a technology for complex semiconductor applications that will be key for ST in the future ST’s high-volume fab for mature technologies will remain focused on 200mm silicon manufacturing and will also host our consolidated global legacy 150mm silicon capabilities ST’s high-volume test and packaging fab in Europe will be upgraded with the addition of advanced automated technologies which will be key to support next-generation products As ST reshapes its manufacturing footprint over the next three years the workforce size and required skill sets will evolve Advanced manufacturing will shift roles from legacy processes involving repetitive manual tasks to a stronger focus on process control ST will manage this transition through voluntary measures with a continued commitment to ongoing constructive dialogue and negotiations with employee representatives in accordance with applicable national regulations the program is expected to see up to 2,800 people leaving the company globally on a voluntary basis These changes are expected to occur mainly in 2026 and 2027 Regular updates will be provided to stakeholders as the program progresses INVESTOR RELATIONS:Jérôme RamelEVP Corporate Development & Integrated External Communication Tel: +41 22 929 59 20 jerome.ramel@st.com MEDIA RELATIONS:Alexis BretonCorporate External CommunicationsTel: + 33 6 59 16 79 08alexis.breton@st.com Already have an account? Login STMicroelectronics has developed a silicon photonics technology for next generation 800Gb/s and 1.6Tb/s optical modules in data centres The PIC100 silicon photonics (SiPHo) process on 300mm wafers at Crolles in France can integrate multiple complex components into a single chip while ST’s next generation proprietary BiCMOS technology brings ultra high-speed and low power processing alongside This is being driven by the AI boom for both rack interconnect and chip-to-chip links general manager for the RF and optical communications sub-group at STMicroelectronics “In the new era of AI servers with all elements optically interconnected ST has the technology for datacentre challenges for higher performance and greater energy efficiency for the power supply and the interconnect,“ he said “The AI boom pushes the need for better performance and more important better power efficiency in data centres.“ The company is entering mass production of silicon photonic devices at Crolles in France on 300mm wafers with yields comparable to that of digital devices “We believe we have the best BiCMOS technology for the electro integrated circuits (EIC) but more importnantly most designs are moving to silicon photonics potentially even eating into short range copper This performance gain can be use for power advantages to provide a better signal to remove the DSP and save power.“ “We decided to hold as the market was not ready but now we believe it is We believe this is the only 300mm  technology with 200Gbit/s per lane We can attach fibre to the edge of PIC for less losses and easier integration for both co-packaged and pluggable modules,“ said Fraisse “This represents the first step for our PIC product-family and thanks to close collaboration with key partners across the entire value chain our ambition is to become a key supplier of silicon photonics and BiCMOS wafers for the datacenter and AI cluster market be it pluggable optics today or optical I/O tomorrow,” said Remi El-Ouazzane Digital ICs and RF products Group at STMicroelectronics A key customer in the development is Amazon Web Services (AWS) which has its own AI training and inference chips “AWS has been intimately involved in the development of the silicon photonics and we also have a cooperation with the leading supplier of optical modules for 1.6Tbit/s systems,“ said Fraisse “PIC100 will enable interconnection between any workload including Artificial Intelligence (AI) AWS is working with STMicroelectronics based on their demonstrated capability to make PIC100 a leading SiPho technology for the optical and AI market.” said Nafea Bshara Vice President and Distinguished Engineer at Amazon Web Services There is another market coming for SiPho which is chip to chip interconnect. This is a key area for startups such as Celestial AI and Lightmatter “ST will provide all the tools to build these optical I/Os within the PIC100 design platform,“ he said The BiCMOS for the EIC devices uses the B55 and B55x silicon germanium (SiGe) process developed as part of the SHIFT project for RF devices and is now being used for a 200 Gbit/s/lane transimpedance amplifier (TIA) “We have 20 large scale customers designing EICs and getting more and more traction We can handle the entire value of the supply chain from the chip design assembly and electrooptic testing which will be a valuable offering to our customers,“ he said The PIC100 process on an SOI substrate has a 50GHz bandwidth with silicon and silicon nitride (SiN) waveguides SiGe diodes with a thick core to couple the fibre to the edge of a chip with low losses “We are bringing the optical interconnect as close as possible to the GPU You would connect the SERDES to an optical I/O engine built of the EIC and modulated by the PIC and connected to the fibre The laser is external and built with III-V technology and coupled to the PIC.” A process development kit (PDK) for PIC100 will help chip developers use the technology “There is a PDK open to all out customers based on devices we have developed at ST with a reference modulator but we will also support customisation of the different devices,” said Fraisse “What is important for us is the yield and reliability for the solution to be viable in an AI cluster.“ The PIC technology will ramp up this year in H2 2025 “We see 200Gbit/s/lane ramping now and one can see that new generations are coming every two years and we have seen a big acceleration so I would expect 400Gbit/s per lane in two years in significant deployment in infrastructure,“ he said “This is the right time for ST to introduce new power efficient silicon photonics technology and complementing it with a new generation of BiCMOS for our customers to design the next wave of optical interconnect products which will enable 800Git/s and 1.6Tbit/s solutions for the hyperscalers,” said El-Ouazzane www.st.com As US President Joe Biden prepares to leave office on January 20 concluding a presidency marked by CHIPS Act initiatives to expand US semiconductor manufacturing Europe's parallel attempts to expand local semiconductor capacity appear to be losing momentum Germany has secured TSMC's investment in the European Semiconductor Manufacturing Company (ESMC) Infineon Technologies and Bosch are also advancing their expansion projects in Dresden Intel's advanced wafer fab in Magdeburg has been stalled for over two years awaiting key decisions that remain unresolved A significant setback lies in the EUR5.7 billion joint wafer fab venture between STMicroelectronics and GlobalFoundries (GF) in France Announced during the 2022 "Choose France" summit with substantial media attention The reasons behind the delay remain unclear Recent earnings calls from STMicroelectronics and GF have provided little clarity leaving the project's status in limbo and confirmation pending from both companies The EUR5.7 billion wafer fab project by STMicroelectronics and GF in Crolles Unveiled during the July 2022 "Choose France" summit and endorsed by French President Emmanuel Macron the initiative was envisioned as a key pillar of Europe's semiconductor strategy GF announced European Commission approval of subsidies under the European Chips Act to fund a 12-inch wafer fab targeting automotive the total project cost was estimated at EUR7.5 billion supported by France's Bpifrance under the "France 2030" initiative no progress has been reported in 18 months Bloomberg indicates the project has been shelved GF CEO Thomas Caulfield criticized Germany's large subsidies for TSMC suggesting they hindered GF's subsidy applications for its Dresden expansion The comments reflect intensifying competition among global semiconductor players for government funding STMicroelectronics and GF redirected their focus to China highlighting the increasing challenges faced by Europe's semiconductor industry GF held its annual technology summit in Shanghai underscoring its strategic focus on the Chinese market GF's Chief Corporate and Government Affairs Officer the newly appointed President of Asia-Pacific and Chairman of GF China introduced plans to expand regional operations told Yicai Global that the company has no intention of building manufacturing facilities or entering basic licensing agreements in China GF plans to partner with local manufacturers to improve production quality Analysts note that GF is targeting Chinese firms with production capacity but limited advanced technologies alongside exploring partnerships with OEMs and chip design companies STMicroelectronics has also deepened its presence in China CEO Jean-Marc Chery announced a partnership with Sanan Optoelectronics to expand an 8-inch SiC wafer fab the company established a new collaboration with Hua Hong Semiconductor emphasizing the competitive advantage of localized manufacturing including Infineon Technologies and NXP Semiconductors have similarly intensified their investments in "Made in China" initiatives by late 2024 These strategic pivots reflect the challenges European companies face amid the US-China tech rivalry Chinese orders remain critical for semiconductor manufacturers Nvidia CEO Jensen Huang captured this dependency in a Financial Times interview likening the absence of Chinese clients to "a swimming pool in a new fab but no water to swim in." Underutilized production capacity continues to burden European firms and may partly explain the stalled STMicroelectronics-GF wafer fab project in France Industry experts have long cautioned that Europe's limited downstream electronics demand is insufficient to support large-scale capacity expansions envisioned by the European Chips Act Political headwinds threaten semiconductor plans are grappling with political and economic challenges that threaten their semiconductor ambitions The Russia-Ukraine war has disrupted Europe's energy supply Even if a ceasefire brokered by a potential Trump administration materializes the conflict's economic toll remains significant Germany's reliance on Russian natural gas has hampered economic growth due to supply disruptions prompting tax hikes and spending cuts to stabilize public finances The rise of far-right conservatism in both nations further complicates large-scale industrial projects Germany's vision of becoming a global semiconductor powerhouse is fading while France faces the stark realities of its overly ambitious chip plans A Trump presidency could exacerbate these hurdles bringing extra geopolitical and economic uncertainties that further hinder Europe's efforts to regain a competitive edge in the global semiconductor market Construction of an FDSOI fab owned jointly by STMicroelectronics and Globalfoundries appears to have been put on hold “The rate and pace of our expansion in Crolles will be in alignment with customer demand and market conditions,” a Globalfoundries spokesperson told Bits&Chips IoT and 5G/6G communication infrastructure applications It’s no secret that these semiconductor markets are experiencing headwinds as do most industry segments other than AI-related chips Bits&Chips strengthens the high tech ecosystem in the Netherlands and Belgium and makes it healthier by supplying independent knowledge and information Bits&Chips focuses on news and trends in embedded systems Our coverage revolves around the influence of technology Bits&Chips uses technologies such as functional and analytical cookies to improve the user experience of the website. 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Please read our privacy statement Give permission or set your own preferences "The ambitious development of the Crolles plant The Franco-Italian group Stmicroelectronics is suffering from tensions between Paris and Rome explaining that the “ambitious development” of the Crolles plant GlobalFoundries – a company based in New York among the top five in the world in terms of semiconductor market share – could withdraw from the partnership with Stmicroelectronics aimed at expanding the Crolles site as part of the project renamed Liberty The development of the Catania plant also seems to be slow “Les Echos” traces the causes of the group's problems in France to the “slowness of procedures” of the bureaucracy and to the local protests especially from environmental organizations Added to these factors are the problems between France and Italy with Rome withdrawing its support for the CEO Jean-Marc Chery “Since (the Prime Minister) Giorgia Meloni is in power Italians are obsessed with the number of appointments,” a source quoted by the newspaper as saying Read also other news on Nova News Click here and receive updates on WhatsApp Follow us on the social channels of Nova News on Twitter, LinkedIn, Instagram, Telegram The prospects for the plan to be picked up later are said to be “uncertain.” The 300mm joint venture plan was announced in 2022 amid excitement around the European CHIPS Act and the terms were agreed in June 2023 The fab was expected to be constructed and at full manufacturing capacity by 2026 in the 18 months since the formal announcement no progress has been made and European markets for automotive and industrial chips have been weak with signs of overhanging inventories At the same time GlobalFoundries has been prioritizing investment in US and STMicroelectronics has been prioritizing overseas sales with such things as its China-for-China strategy ST tips Hua Hong deal to support ‘China-for-China’ strategy ST also flagged in recent financial results that it expected a weak start to 2025 in terms of its sales and a planned corporate “resizing” program that is being drawn up with the goal of saving the company close to US$1 billion per year in operating costs by 2027 GlobalFoundries was reportedly the lead investor in the joint venture with 58 percent and ST holding 42 percent The French government was prepared to provide €2.9 billion The GF-ST plan seems to have joined another that has been shelved – that of Intel for two wafer fabs in Magdeburg Both appear to have suffered from the fact that there is insufficient electronics manufacturing in Europe to create demand for major fab building projects www.globalfoundries.com GloFo plans to create advanced packaging center in New York ST tips restructuring program and a weak start to 2025 GloFo, ST finalize terms for €7.5 billion wafer fab at Crolles a global leader in feature-rich semiconductor manufacturing today announced they have signed a Memorandum of Understanding to create a new jointly-operated 300mm semiconductor manufacturing facility adjacent to ST’s existing 300mm facility in Crolles This facility is targeted to ramp at full capacity by 2026 with up to 620,000 300mm wafer per year production at full build-out (~42% ST and ~58% GF) ST and GF are committed to building capacity for their European and global customer base This new facility will support several technologies This includes GF’s market leading FDX technology and ST’s comprehensive technology roadmap down to 18nm which are expected to remain in high demand for Automotive and Mobile applications for the next few decades.  FD-SOI technology has origins in the Grenoble (France) area It has been part of ST technology and product roadmap in its Crolles facility since the early beginnings and it was later enabled with differentiation and commercialized for manufacturing at GF’s Dresden facility FD-SOI offers substantial benefits for designers and customers including ultra-low power consumption as well as easier integration of additional features such as RF connectivity ST and GF will receive significant financial support from the State of France for the new facility This facility will strongly contribute to the objectives of the European Chips Act including the goal of Europe reaching 20% of worldwide semiconductor production by 2030 multi-year investment in advanced semiconductor manufacturing in Europe it will support the leadership and resilience of the European technology ecosystems from R&D (with the recently announced cooperation on R&D among ST CEA-Leti and Soitec) to large-volume manufacturing and support European and global customers with additional capacity in complex advanced technologies for key end-markets including automotive The new manufacturing facility will be a substantial contributor to global digital and green transformations – delivering key enabling technologies and products It will generate additional employment at the ST Crolles site (approximately 1,000 additional staff for the new manufacturing facility) and across its ecosystem of partners ST and GF will leverage the economies of scale at the Crolles site as they accelerate semiconductor capacity the world needs with high capital efficiency.  “This new manufacturing facility will support our $20 billion+ revenue ambition Working with GF will allow us to go faster and reinforce the European FD-SOI ecosystem We will have more capacity to support our European and global customers as they transition to digitalization and decarbonization” said Jean-Marc Chery “ST is transforming its manufacturing base We already have a unique position in our 300mm wafer fab in Crolles France which will be further strengthened by today’s announcement We continue to invest into our new 300mm wafer fab in Agrate (near Milan ramping up in H1 2023 with an expected full saturation by end 2025 as well as in our vertically integrated silicon carbide and gallium nitride manufacturing.”  “Our customers are seeking broad access to 22FDX® capacity for auto and industrial applications. The new facility will include GF dedicated foundry capacity for our customers offering GF’s unique innovation and will be managed by GF personnel onsite new manufacturing capacity expansion leverages ST’s Crolles existing facility infrastructure enabling GF to accelerate our growth while benefiting from economies of scale to deliver additional capacity in a highly capital efficient manner on our differentiated 22FDX platform that has shipped more than one billion chips we are expanding GF’s presence within Europe’s dynamic technology ecosystem and reinforcing our position as the leading semiconductor foundry in Europe,” said Dr “Our global footprint enables GF to not only meet our customers capacity needs but also provides them supply chain security The partnership investment with the French government along with our long-term customer agreements creates the right economic model for GF’s investment.”  Additional information for GF investors is available at investors.gf.com.  The project is subject to the execution of definitive agreements and various regulatory approvals including from the European Commission’s DG Competition and to the completion of the consultation with ST’s French Works Council.  Some of the statements contained in this release that are not historical facts are statements of future expectations and other forward-looking statements (within the meaning of Section 27A of the Securities Act of 1933 or Section 21E of the Securities Exchange Act of 1934 each as amended) that are based on management’s current views and assumptions and are conditioned upon and also involve known and unknown risks and uncertainties that could cause actual results or events to differ materially from those anticipated by such statements Such forward-looking statements are subject to various risks and uncertainties which may cause actual results and performance of our business to differ materially and adversely from the forward-looking statements Certain forward-looking statements can be identified by the use of forward looking terminology such as “believes,” “expects,” “may,” “are expected to,” “should,” “would be,” “seeks” or “anticipates” or similar expressions or the negative thereof or other variations thereof or comparable terminology Some of these risks are set forth and are discussed in more detail in “Item 3 Key Information — Risk Factors” included in our Annual Report on Form 20-F for the year ended December 31 Should one or more of these risks or uncertainties materialize or should underlying assumptions prove incorrect actual results may vary materially from those described in this press release as anticipated to update any industry information or forward-looking statements set forth in this release to reflect subsequent events or circumstances.  Unfavorable changes in the above or other risks or uncertainties listed under “Item 3 Key Information — Risk Factors” from time to time in our Securities and Exchange Commission filings could have a material adverse effect on our business and/or financial condition.  This news release may contain forward-looking statements Readers are cautioned not to place undue reliance on any of these forward-looking statements These forward-looking statements speak only as of the date hereof GF undertakes no obligation to update any of these forward-looking statements to reflect events or circumstances after the date of this news release or to reflect actual outcomes INVESTOR RELATIONS: Céline Berthier Group VP, Investor Relations Tel: +41.22.929.58.12 [email protected]  MEDIA RELATIONS: Alexis Breton Corporate External Communications Tel: + 33.6.59.16.79.08 [email protected]  Laurie Kelly GlobalFoundries +1 518 265 4580  [email protected]  Join GF and help us shape what’s essential GlobalFoundries (GF) is a leading manufacturer of essential semiconductors the world relies on to live, work and connect. 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All rights reserved ST and GlobalFoundries are to build a 300mm fab at Crolles The fab will support a range of technologies There will be  significant financial support from France for the project which is costing $5.7 billion The fab is targeted to ramp to full capacity by 2026 The fab will  contribute to the objectives of the European Chips Act In will support the European  Technology ecosystem from R&D (with the recently announced cooperation on R&D among ST and support European and global customers with additional capacity in advanced technologies for key end-markets including automotive We will have more capacity to support our European and global customers as they transition to digitalization and decarbonization” says ST CEO  Jean-Marc Chery  “ST is transforming its manufacturing base as well as in our vertically integrated silicon carbide and gallium nitride manufacturing.” “Our customers are seeking broad access to 22FDX capacity for auto and industrial applications,” says GloFo CEO Dr Thomas Caulfield  “the new facility will include GF dedicated foundry capacity for our customers offering GF’s unique innovation and will be managed by GF personnel onsite we are expanding GF’s presence within Europe’s dynamic technology ecosystem and reinforcing our position as the leading semiconductor foundry in Europe Our global footprint enables GF to not only meet our customers capacity needs but also provides them supply chain security creates the right economic model for GF’s investment.” Tagged with: the chip shortage has hit STM32 stock especially hard Honest small customers have been sidelined by large customers and price gougers Δdocument.getElementById( "ak_js_1" ).setAttribute( "value" Electronics Weekly is excited to launch it's own podcast brought to you by our editor Caroline Hayes You can hear interesting insights from a range of industry figures Catch all the episodes » Sign up for the Electronics Weekly newsletters: Mannerisms Gadget Master and the Daily and Weekly roundups Find out more » Read our special supplement celebrating 60 years of Electronics Weekly and looking ahead to the future of the industry Read the first ever Electronics Weekly online: 7th September 1960 We've scanned the very first edition so you can enjoy it Read the very first edition » Keep up with developments relating to space technology - satellite technology View our busy aerospace section » Keep up with developments relating to the Internet of Things (IoT) - Industrial IoT View our popular Internet of Things section » Keep up with developments relating to Power electronics - MOSFETs View our busy Power section » the semiconductor company controlled by Italy’s Ministry of Finance and the French public bank Bpifrance signed a strategic agreement with Chinese firm Innoscience for the development and production of gallium nitride (GaN) technology—a high-performance semiconductor that operates with minimal heat generation STMicroelectronics has long maintained a centre of excellence in power technologies in Catania where a specialised research hub collaborates closely with the National Research Council of Italy supported by around €30 million in public funding The situation is compounded by challenges at STMicroelectronics’ facility in Agrate Brianza which has become secondary to the French plant in Crolles The move reflects strategic drift at STMicroelectronics The STMicroelectronics-InnoScience deal could open the door to deeper technological entanglement with China Francesco Corvaro spent last week in Washington engaging US Department of Energy officials on nuclear fission and fusion Rome has sent two Canadair water‑bombers to assist Israel in battling forest fires acting swiftly under the EU’s rescEU mechanism Decode39 is a spin-off project stemming from Formiche a leading geopolitical and analytical news outlet that has been informing Italian decision-makers since 2004 We provide authoritative content and geopolitical insights taking advantage of Italy’s unique perspective as a global crossroads to reach English and Arab-speaking readers around the world authoritative content and geopolitical insights from Italy to Arabic readers around the world DECODE39 IN ARABIC> GlobalFoundries and STMicroelectronics have announced the successful conclusion of their agreement to establish a jointly-operated high-volume semiconductor manufacturing facility in Crolles The agreement was initially announced on July 11 emphasized the significance of the partnership with ST in Crolles as it expands GlobalFoundries' presence within Europe's semiconductor ecosystem "Together we will deliver GF's market leading FDX technology and ST's comprehensive technology roadmap in alignment with customer demand which is expected to remain high for Automotive and Mobile applications over the next decades," said Caulfield GF's proprietary FDX process technology platform is based on fully-depleted silicon-on-insulator (FD-SOI) technology acknowledged the importance of the achievement for both ST and GlobalFoundries He credited the French government and the European Commission for their support Chery emphasized the goal of strengthening the European and French FD-SOI ecosystem and increasing capacity for European and global customers in advanced technologies for key markets such as automotive These efforts align with the ongoing transition to digitalization and decarbonization Chery also noted that the new manufacturing facility will contribute to their ambition of achieving over US$20 billion in revenue The program is estimated to incur an overall cost of EUR7.5 billion The new facility will receive EUR2.9 billion of support from the French government This aid measure aligns with the objectives outlined in the European Chips Act and is part of the "France 2030" plan which recently gained approval from the European Commission The fab is to supply FDSOI circuits used for low power and wireless designs as well as some bulk CMOS At full capacity in 2026 the plant will produce 620,000 wafers per year 58 percent for Globalfoundries and 42 percent for ST The news that ST’s Crolles site in France will gain another 300mm wafer fab and a base for further FDSOI process development is a good thing for Europe the companies concerned and their customers the idea that it will help Europe get closer to producing 20 percent of the world’s chips by 2030 is far-fetched But on the positive side it represents some realistic thinking by the politicians and a willingness to execute by chip companies that could help keep Europe in the deep tech game for another decade The news of a wafer fab that can produce about 51,000 wafers per month at full capacity is illustrative of the power of political will and tax-payer subsidy CEO of Globalfoundries confirmed that without French state support the investment would be  “challenging.” I take this to be short-hand for “would not happen.” That an alliance and subsidies are required to build a next fab at Crolles and to provide a base for the development of FDSOI (fully-depleted silicon on insulator) manufacturing process is no surprise After all the original 300mm wafer fab at Crolles was developed 20 years ago by an alliance between ST Philips (later NXP Semiconductor) and Motorola Semi (subsequently Freescale and then acquired by NXP Semiconductor) No European company could afford to go it alone at the leading-edge then Chipmaking costs at the leading-edge and close to it have been increasing exponentially since then the CEOs of Globalfoundries and STMicroelectronics have not said much about the cost of their joint-venture wafer fab planned for Crolles or how much subsidy they will be getting from the French government under the European Chips Act Speaking with the press on a conference call ST CEO Chery said the fab would be a multi-billion euro investment and that France’s promised support was “significant.” Meanwhile the French government reportedly disclosed that the joint investment would be worth about €5.7 billion (about US$5.8 billion) without saying how much money it would be putting up If GF and ST have to find €4 billion between them then that would leave the French state providing €1.7 billion or about 30 percent of the cost This would seem to represent a minimum level of subsidy in the modern era of wafer fab building It is also positive that Crolles next 300mm wafer fab is aimed at application sectors for where there is European demand and world-leading capability: in automotive electronics Crolles is set to be the second chip manufacturing site that is likely to benefit from the €43 billion European Chips Act Intel is set to get about 40 percent subsidy support or about €6.8 billion (about US$6.9 billion) from the German government towards the €17 billion initial cost of building two side-by-side wafer fabs in Magdeburg The higher level of subsidy could be due to the fact that Magdeburg will be a completely new semiconductor manufacturing lacking in infrastructure that needs to be developed One thing we did find out from the conference call with GF and ST CEOs is that the fab ownership will not be 50:50 but in proportion to the ownership of equipment in fab and the output from the fab The facility is expected to ramp quickly to full capacity by 2026 with a manufacturing capacity of up to 620,000 300mm-diameter wafers per year with ST taking about 42 percent of the wafers and GF taking about 58 percent of the wafers GF CEO Caulfield said the ownership of fab was essentially in the equipment installed and that these were good figures of merit for that We also found out that the fab will make multiple processes including 40nm bulk CMOS Globalfoundries’ 22FDX process  and that it would provide an environment for both companies to take FDSOI down to 18nm The ramp to full production by 2026 is aggressive and implies a start to production in 2024 and indeed the start could not be much sooner than that One concern is that some key pieces of 300mm chip production equipment are on 24-month delivery lead times while the chip making industry goes through a global spasm of capacity expansion planning The supply of complete equipment chains could be a limiting factor in the roll out of the GF-ST fab but Caulfield did say that in some cases the companies have already put orders in with equipment companies Both CEOs were keen to say that their fab would support the aims of the European Chips Act to get European chip production up to 20 percent of global production by 2030 According to market research firm IC Insights Europe had 5.7 percent of the world’s installed wafer capacity as of December 2020 and given the lack of leading-edge production in Europe by value Europe’s production could be considerably lower It is obvious that if Europe wants to gain market share it needs to invest in chip production proportionately faster than other regions But the investments now being made by Intel GF and ST under the European Chips Act – while welcome and unusual in Europe – are relatively minor by global standards Here we are cheering for the possibility of two or three production-scale digital wafer fabs getting built in Europe over the next several years while a single foundry company such as TSMC seems to throw 300mm fabs down each and every year If the US government can fund its own Chips Act it will unlock large investments in the US by Intel Taiwan and China continue to invest much larger sums At the same time regions such as India are eager to join in with chip making The balance of semiconductor payments is now seen by many countries and most as key to both short and long-term economic well-being The conclusion must be that Europe’s share of global chip production will stop falling – but at least Europe has started to move after many years of taking the globalization dividend And it must be acknowledged that the visionaries within the European Commission have managed to managed to get chip company support in a way that Commission vice president Neelie Kroes could not a decade before With Intel eager to operate a foundry service at the leading-edge and GF and ST keen to operate in the More-than-Moore space the European politicians have covered twin aspects of the need to keep up with global competition And it should be recognized that many future technology developments such as silicon photonics quantum computing and spintronics are built upon know-how and capability in semiconductor manufacturing What we can say is that the European politicians Globalfoundries and STMicroelectronics are helping to secure the chance of continued deep-tech capability in Europe for another few years.And further investment And at some time before the end of this decade it will be time to go again The price of deep-tech progress is consistent support and subsidy www.globalfoundries.com; www.st.com STMicroelectronics has built a digital twin of its fab in Crolles The company is using its STM32 32bit microcontrollers with embedded AI to monitor fab equipment and automated transport systems This is combined with multiple data sources in a digital twin that allows predictive maintenance and system optimisation Group Vice President of the Group Vice President of Strategic Technology & System Architecture in the Microcontrollers and Digital ICs Group (MDG) group at ST He is also vice-president of the Minalogic Collaborative R&D Cluster in Grenoble “Industry 4.0 applications are very diverse and require sophisticated CPS hardware and software wireless and RTOS,” said Magarshack in a keynote on cyberphysical systems (CPS) at the DATE 2021 conference “In smart factories all production steps are digitally mapped in a digital twin and connected At ST we are not only designing products for Industry 4 .0 but using these techniques Several hundreds of steps in a fab with multiple parameters so it is fundamental to collect and analyse in real time all these parameters.” Running 6300 wafers per week the 300mm fab at Crolles generates 3TB of data per day ST is using three AI techniques for monitoring wafers and equipment Advanced defect classification (ADC) automatically classifies wafer defects with CNN neural network pattern matching so that corrective action in real time and defects are caught before other processes are added in Instead of measuring a single temperature the complete curve is captured and compared against the golden curve This allows real time modelling and decision making to optimise productivity All the data is collected in a factory level digital twin as a system of systems There are 600 process steps for every wafer with a cycle time 12 weeks and 150 robot vehicles each travel 45km per day moving wafer lots between equipment with 60,000 transports per day.  The twin is a 3D model of the equipment with traffic simulation and fab process optimisation tools “Having a digital twin of a fab enables many optimisations and allows us to anticipate the performance of many combinations of process that would be impossible to carry out in real life,” said Magarshack This also includes the high level models of the sensors and system-on-chip controllers “CPS devices are at the heart of smart factories and the data generated for digital twins and we extend SoC validation to factory level use cases and we use it in our own factories,” he said “The SoC digital twin gives us capability to peek and poke inside a chip for testing unreachable areas and allows us to inject errors anywhere in the system to see what would happen A wireless network co-simulation of the CPS using the actual embedded software and simulated RF link to test in a factory before they are deployed These advanced high level models are instrumental in development and are useful even for products in the field.” The company is developing a next generation of vibration sensor with its STM32WB controller with AI detection that it will install in fabs in the future with a smaller form factor But it is not just the AI that is important but the data cleaning and semantics of test “We are developing a roadmap with specific AI accelerators and these are based on our own architecture developed in internally in ST as we have low power and an understanding of the applications and these will come out in the next year to 18 months,” said Magarshack “The emphasis is on detecting and understanding the weak signals. The image of the wafers and their classification is a confined set of problems. We started the journey a year or two ago of identifying single sources of data and we are 20 percent of the way to getting the full value from the data generated each day,” he said “We probably have two or three more years to go to get the full benefit but the next big step will happen when we can combine the information form multiple sources This  is difficult as these have different semantics for defects and different causes of defects and so are not easily connected to each other “The next challenge for the industry is to come up with a reference data model that can be applied across the board For example in final test you have automatic test pattern generation (ATPG) with test vectors  identifying a short between two lines of metals but this does not align with the image based classification tool so we need to think about a body of defects and this should be recognised acrosss the various sources of test “That’s one area for industrial attention,” he said “80 percent of the work is in the data cleaning 20 percent on the algorithms and AI itself so the data cleaning needs attention and some of that is implementable and that’s an area of research I would recommend.” STMicrolectronics is to build a second 300mm fab at its site in Crolles this time in partnership with GlobalFoundries The two companies have signed a Memorandum of Understanding to create the new fab for fully depleted silicon on insulator (FD-SOI) which is used for low power and wireless designs This technology is currently uses  22nm technology and so will not require leading edge manufacturing equipment which is in short supply The fab will also produce parts on 40nm and 28nm bulk CMOS aims to take advantage of support in the EU Chip Act for semiconductor manufacturing as well as French government support to boost local manufacturing At full capacity in 2026 the plant will produce 620,000 wafers per year “At full build out this will expand our capacity for more than 1m wafers per year across Crolles and Dresden,” said Thomas Caulfield The two companies have already placed orders for equipment which can have lead times of 12 to 24 months There is also a European project to develop FD-SOI further to 10nm with ST The current 300mm wafer fab at Crolles was developed 20 years ago under the Crolles 2 Alliance The company has already built a digital twin of Crolles and is using that for interoperability to move production between fabs ST has built another 300mm CMOS fab at Agrate in Italy for power and RF designs which is was planning to share with Tower Semiconductor www.st.com; www.globalfoundries.com STMicroelectronics competitively plans to transition to 8-inch wafers starting from 2024 The company will integrate Soitec’s SmartSiC technology to enhance efficiency and reduce carbon emissions STMicroelectronics aims to increase capacity and collaborate with Chinese firm Sanan Optoelectronics to raise SiC chip-related revenue from the expected USD 1.2 billion in 2023 to USD 5 billion by 2030 STMicroelectronics and Sanan Optoelectronics announced a joint venture to establish a new 8-inch SiC device fab in Chongqing with an anticipated total investment of USD 3.2 billion To ensure the successful implementation of this extensive investment plan Sanan Optoelectronics said to utilize its self-developed SiC substrate process to construct and operate a new 8-inch SiC substrate fab independently TrendForce: over 90% SiC market share by major global players         the SiC industry is currently dominated by 6-inch substrates while 8-inch substrates only account for 1% Transitioning to larger 8-inch substrates is a key strategy for further reducing SiC device costs 8-inch SiC substrates offer significant cost advantages than 6-inch substrates The industry’s major players in China are advancing the development of 8-inch SiC substrates This shift from the approximately 45% of total production costs associated with substrates is expected to facilitate the broader adoption of SiC devices and create a positive cycle for major companies Not only Chinese companies but also international semiconductor giants like Infineon Technologies and Onsemi are actively vying for a share of the market Infineon has already prepared the first batch of 8-inch wafer samples in its fab and plans to convert them into electronic samples soon with mass production applications scheduled before 2030 International device companies like Onsemi and ROHM have also outlined development plans for 8-inch SiC wafers major companies hold over 90% of the market share A slowdown in progress could provide opportunities for followers the market share of the top 5 SiC power semiconductor players in 2022 was dominated by STMicroelectronics (36.5%) leaving the remaining companies with only 9.6% Confirming an earlier report Globalfoundries and STMicroelectronics intend to construct a jointly-operated fab in Europe The two parties signed a memorandum of understanding to construct a 300mm facility in Crolles to be used mostly for manufacturing FD-SOI ICs GF will produce about 58 percent of the targeted maximum capacity of 620,000 wafers per year ST will take ownership of the remaining 42 percent This article is exclusively available to premium members of Bits&Chips Become one for only €15 and enjoy all the benefits Having trouble logging in? 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The new facility is said to support a "broad range of technologies" including GF’s FDX technology and ST’s technology roadmap down to 18nm for automotive IoT and communications infrastructure applications The facility is targeted to ramp at full capacity by 2026 with up to 620,000 300mm wafer per year production at full build-out (42% ST and 58% GF) The companies state that the facility will generate additional employment at the ST Crolles site (approximately 1,000 additional staff for the new manufacturing facility) and across its ecosystem of partners This new manufacturing facility will support our $20 billion+ revenue ambition as well as in our vertically integrated silicon carbide and gallium nitride manufacturing Our customers are seeking broad access to 22FDX capacity for auto and industrial applications The new facility will include GF dedicated foundry capacity for our customers offering GF’s unique innovation and will be managed by GF personnel onsite creates the right economic model for GF’s investment ST and GF will receive "significant financial support" from the State of France for the new facility.  Nic Fleming is a science writer in Bristol When President Emmanuel Macron unveiled his strategic plan for France’s electronics industry on 12 July last year he did so not in front of any of the familiar Parisian landmarks but at a factory in the shadow of the tooth-like Dent de Crolles mountain Prices may be subject to local taxes which are calculated during checkout doi: https://doi.org/10.1038/d41586-023-00109-x This article is part of Nature Spotlight on Science in France Advertisers have no influence over the content Lecouat, B., Ponce, J. & Mairal, J. Preprint at https://arxiv.org/abs/2104.06191 (2021) Download references Why the green-technology race might not save the planet Six roadblocks to net zero — and how to get around them AI race in 2025 is tighter than ever before 23andMe plans to sell its huge genetic database: could science benefit How we call out the infuriating mistakes we spot in school science textbooks My fight to unlock cannabis and psychedelic drugs for use in medical research HT is an interdisciplinary research institute created and supported by the Italian government whose aim is to develop innovative strategies to pr.. UNIL is a leading international teaching and research institution with over 5,000 employees and 17,000 students split between its Dorigny campus Department of Energy and Environmental Materials and advance cancer research in a leading translational institute Olivia Newton-John Cancer Research Institute We are seeking a tenure-track associate professor to promote interdisciplinary research in nanoprobe life sciences or related interdisciplinary field Sign up for the Nature Briefing newsletter — what matters in science Strike action has begun at ST following a decision by management not to give a rise to all employees despite recording Q3 revenues 27.8% up on Q2 for a gross profit of $1 billion and a forecast of 12% sequential profit for Q4 CFDT and CGT) have called a strike at all ST sites from today On the morning shift there were 60 strikers and on the mid-day shift about 150 CAD expects to see 200 on strike for the night-shift ST management showed incredible contempt for ST employees and their work by not recognising the efforts made by employees by deciding not to increase them this year ‘management does not recognise at all the efforts requested and made by its employees during confinement.” CAD goes on to say that ST management treats its workers as mougeons (a hybrid of sheep and pigeons) by getting them to pay for the costs of COVID by the €16.9 million additional costs due to anti-COVID measures including $6.4 million euros for COVID premiums and compensation in the factory,” says CAD “it thus confirms the fears of the CAD to know that these bonuses distributed during confinement would be recovered from the wages of all employees and in particular from the wages of other employees who do not work in the factory or who could no longer work there.” “It is absolutely indecent that the management of ST also directly and openly funds the measures against COVID by the employees themselves,” concludes CAD Meanwhile the CGT union points out  that the 100 senior executives of ST in France receive on average € 200,000 per year with € 50,000 free shares Tagged with: Want to kill your business … allow the unions in This kind of blatant disregard for employees is exactly the reason unions exist Connecting decision makers to a dynamic network of information Bloomberg quickly and accurately delivers business and financial information Photographer: Jean-Philippe Ksiazek/POOL/AFP/Getty Images as demand in the auto industry remains strong The Franco-Italian chipmaker posted net revenue of $4.4 billion for the fourth quarter in line with an estimate from analysts surveyed by Bloomberg The custom 18K resolution image sensor custom was developed by ST for Big Sky for the world’s most advanced camera system and is used to capture ultra-high-resolution content for Sphere in Las Vegas the Big Sky camera system (below) was designed by the team at Sphere Studios The 18K sensor capable of capturing images at the scale and fidelity necessary for Sphere’s display and is the world’s largest cinema camera sensor in commercial use is almost 7x larger and 40x higher resolution than the full-frame sensors found in high-end commercial cameras which measures 9.92cm x 8.31cm (82.4 cm2) and only four full die fit on a 300mm wafer (shown above) The system is also capable of capturing images at 120 fps and transferring data at 60 gigabytes per second Big Sky also allows filmmakers to capture large-format images from a single camera without having to stitch content together from multiple cameras This avoids issues common to stitching including near distance limitations and seams between images Ten patents and counting have been filed by Sphere Studios in association with the Big Sky technology  “ST has been on the cutting edge of imaging technology and tools to create unique solutions with advanced features and performance for almost 25 years,” said Alexandre Balmefrezol Executive Vice President and Imaging Sub-Group General Manager and seemingly impossible yield requirements presented a truly novel challenge for ST – one that we successfully met from the very first wafer out of our 12” (300mm) wafer fab in Crolles The Big Sky camera developed by Sphere Studios “Big Sky significantly advances cinematic camera technology with each element representing a leap in design and manufacturing innovation,” said Deanan DaSilva lead architect of Big Sky at Sphere Studios “The sensor on any camera is critical to image quality but given the size and resolution of Sphere’s display Big Sky’s sensor had to go beyond any existing capability leveraged their extensive expertise to manufacture a groundbreaking sensor that not only expands the possibilities for immersive content at Sphere but also across the entertainment industry.” thesphere.com; www.st.com Infineon and Marelli enter new era of automotive cockpit design with MEMS laser beam scanning at 2025 Auto Shanghai Trump’s Trade Bombshell: Tariffs on China Hit 245% India Aims to Capture 10% of Global Chip Demand by 2030 Cost of Semiconductor Chips per Vehicle to Double by 2030: NITI Aayog Infineon expands its GaN power portfolio with EasyPACK CoolGaN power modules for high-voltage applications Rohde & Schwarz pioneers the future of automotive Ethernet using Analog Devices’ 10BASE-T1S solutions Keysight Awarded NATO FORACS Contract to Enhance Operational Readiness Power and Thermal Management Concerns in AI: Challenges and Solutions Vishay Intertechnology 1 Form A Solid-State Relays Offer Continuous Load Current to 5 A in Compact SOP-4 Package Rohde & Schwarz presents its advanced solutions for power electronics testing and characterization at PCIM Expo 2025 Vishay Intertechnology Thick Film Power Resistor With Optional NTC Thermistor and PC-TIM Simplifies Designs and Saves Board Space Security by Design in Electronics: A Proactive Approach to Cybersecurity Keysight Introduces Comprehensive LPDDR6 Solution for End-to-End Memory Design and Test Workflows System-level considerations for EVSE design Keysight Introduces System Designer for PCIe and Chiplet PHY Designer for Digital Standards-Driven Simulation Workflows TI pioneers new magnetic packaging technology for power modules, cutting power solution size in half The 3D Printing Industry in India: Growth, Opportunities, and Challenges Top 10 3D Printing Companies in India Optimize MES intelligence in semiconductor advanced packaging Amtech Shares Key Trends Shaping the Future of Electronics Manufacturing in 2025 Exporting Power: India’s Growing Influence In Global Transformer Supply Chains Engineering the Future of Compact Audio: A Deep Dive into the NAU82110YG Filter-Free Class-D Amplifier Unlocking the Potential of 6G FR3 ST’s Automotive MCU technology for next-generation vehicles Steel Soldering: Definition, Process, Working, Uses & Advantages Understanding Metal Soldering: Definition, Process, Working, Uses & Advantages Stealth Technology: Definition, Types, Working & Applications Top 10 eSIM Manufacturers in India Powering a Sustainable Future: How STMicroelectronics is Leading by Design Rewiring the Future of India’s Power Grid with Wirepas Pushing the Boundaries of Miniaturization with Texas Instruments’ New MCU Delta Electronics Fuels India’s Digital Ambitions with Scalable, Sustainable ICT Solutions STMicro’s manufacturing strategy is a study on a long-range plan to use the resources of the manufacturing system to support the business strategy and in turn meet the business objectives STMicroelectronics is an independent integrated device manufacturer with in-house manufacturing complemented by outsourcing partners ST’s manufacturing strategy is a key enabler for future growth and in the last two years the company has accelerated capacity investments to cope with the unprecedented semiconductor demand growth ST’s manufacturing footprint is being transformed with strategic investments in 300mm wafer manufacturing and growing wide bandgap technologies The vertical integration of SiC will increase company’s value creation The company already has a unique position in 300mm as a high-volume manufacturer with digital technologies including embedded non-volatile memory ranging from 90nm down to 28nm serving the bulk of technology requested by the industrial and automotive market This makes ST’s manufacturing footprint unique among the peers technology and manufacturing are also instrumental to ST competitiveness and customer service capabilities a huge variety of packages and complement internal production and technology offer with selected collaboration with subcontractors STMicroelectronics gives an overview of ST’s manufacturing strategy The excerpts of the interview are given below: Introduction to Semiconductor Manufacturing: Chip manufacturing is the process of creating individual packaged and tested integrated circuits (IC) from a semiconductor wafer Semiconductor manufacturing process is quite complicated Some of the mind-boggling facts are really astonishing to a lay man given below: It requires 7 seconds to renew all the air in a fab cleanroom – typically bigger than a football stadium It requires 1,000 times fewer airborne particles in a fab cleanroom than in a hospital operating room The advanced transistors are 10,000 times smaller than the width of a human hair we can make almost 5,000 pieces of 8-inch wafer 40 km Distance covered by a wafer in the fab during processing There are more than 100,000,000 transistors per square mm in the most advanced chips and more than 1,000,000,000,000 semiconductor chips made worldwide per year Exploring the limits: Semiconductor size – or node size – is indicated in nanometer a unit that equals one billionth of a meter (or 0.000000001m) Semiconductor chips in terms of size are even smaller than the cat flea Chips with 14 and 10 nanometers are currently in mass production but the industry continues to aim for smaller node sizes i.e The manufacturing cycle time involves hundreds of steps and can take up to four months from design to mass production Time is required to make a wafer involves electrical wafer sorting Normally it takes 20 to even thirty 30 weeks That is why ST asks its customers to plan their semiconductor requirements well in advance as to how many chips and what kind of chips they need Overview of manufacturing at ST:  ST is an integrated device manufacturer foundry and back end (packaging & testing) ST has a lot of manufacturing facilities across the world For front end foundry the major locations are Sweden Packaging and testing facilities are in Italy ST has factories covering the front end and back end across many countries ST people strength: ST has a global presence It has around 50,000 employees spread across the world ST offers its customers multiple sources and integrated supply chain control ST has different manufacturing locations – focusing on different technologies and products ST has the capability to shift the production workload across different locations not to be impacted by a single location for whatever reason ST’s technologies enable product differentiation and customer success and most of the technologies are proprietary ones ST has smart power technologies covering BCD Under MEMS technologies ST has analog mixed-signal technologies Under flash technology ST has a lot of special technologies focusing on embedded flash For packaging technologies ST is quite nimble and resilient in providing the best combinations of lead frame ST’s technology R&D is integrated with fabs: ST’s factory has technology R&D integrated into it The company has facilities for design close to the manufacturing unit Factory/fab has human resources focusing on R&D and design to provide continuous innovation of the technologies ST also focuses on the innovations in assembly and testing the subcontractors for packaging and testing to continuously innovate with the latest technology to serve end markets such as smart mobility ST’s technology R&D and manufacturing strategy is the key enablers of business: ST is investing in competitive proprietary technologies and in-house manufacturing complemented by outsourcing creating a reliable supply chain for its customers ST has plans to double the internal manufacturing capacity for the 300 millimeter ST is Focusing on investing in Silicon Carbide and GaN and building internal technology capacity to offer 200 millimeter and plan to achieve the internal production of the 8 inch in 2023 ST is working with outsourcing partners to have Support from foundries & OSATs on capacity growth Strategic manufacturing programs: For 300 mm capacity expansion ST has manufacturing units at Crolles For Wide bandgap capacity expansion ST has Catania unit on SiC technologies and Tours unit ST partners with GlobalFoundries for Sustainable manufacturing: ST and GlobalFoundries have set up a new manufacturing facility in France It is ISO certified for environmental and energy management It is the world’s cleanest fab in the semiconductor industry Integrated SiC substrate manufacturing facility: ST has planned to integrate the SiC substrate into the entire manufacturing strategy for SiC devices and technologies ST acquired Norstel in 2019 to expand the capacity including moving production from Norrköping in Sweden to Catania in Italy It will be a first of a kind in Europe for the production in volume of 150 millimeter SiC epitaxial substrate which is 6 inch epi integrating all steps in the production flow and this is the site to develop the 8 inch wafer in the near future The production is expected to start in 2023 Catania is an important site for ST power innovation: ST is leading in SiC R&D with a large portfolio of key patents It is the home to the largest SiC R&D and manufacturing operations It has an established eco-system on power electronics with long-term successful collaboration between ST and different stakeholders ST will increase from 17% of our total production mix with 12 inch capacity to 33% in 2025 And the main sites for 12 inch are Crolles in France and Agrate in Italy it’s progressing smoothly to ramp up in 2023 Most of the production qualification has been planned to be completed by the first half of this year Fast ramp thanks to capacity sharing with Tower Semiconductor The first wafer production lot has been successfully released in October ST is accelerating the expansion of SiC device manufacturing capacity More than 100 million devices shipped to automotive customers ST has expanded it more than 2.5 X by the year 2022 Catania and Singapore are the main sites for SiC manufacturing and for assembly and testing of SiC Shenzhen and Bouskoura are the sites ST has acquired Norstel hence plans to have more than 40% internal supply of substrate by 2024 ST is focusing a lot on GaN technology because it’s a huge complementary technology to SiC to cover the customer demand for power devices ST has power conversion GaN and the RF-power GaN and has 200 mm power GaNfab in Tours with fab qualification in 2022 ST has 6 inch RF-GaN in Catania and has fab qualification available in 2022 Strategic manufacturing outsourcing: ST is working with outsourcing partners for strategic manufacturing ST is leveraging 80% from internal source for fab capacity and working with partners for 20% of external source ST provides 65% of the internal capacity while sourcing from partners OSAT provides 35% of the capacity Agrate: The Agrate Brianza is one of ST’s main front-end fabs as well as R&D center for Smart Power and MEMS technologies In addition to the long-running 200 mm fab ST is building out a state-of-the-art 300 mm fab which will be qualified for production in the first half of 2023 Main technologies: BCD including Advanced BCD with PCM and galvanic isolation MEMS sensors & actuator (ThELMA Bouskoura: Bouskoura represents one of the most advanced chip packing and testing facilities in the world It supplies products to industries with the highest quality requirements such as automotive Calamba: Calamba plant is a sophisticated IC and module back-end manufacturing facility which assembles and tests a diverse range of products The site plays an important role in advancing new packaging technologies multi-stack and multi-IO assembly and higher-value module solutions Catania: Catania hosts front-end manufacturing addressing power and smart power applications for automotive It also produces analog ICs and ASSP for a broad range of applications R&D and production activities for the development and manufacturing of ICs in digital technologies on 200 mm and 300 mm silicon wafers and other advanced devices based on differentiated CMOS technologies Kirkop: Kirkop plant is the largest back-end site in Europe It is a world-class assembly and testing plant for a wide range of products serving automotive and personal electronics customers Marcianise: Marcianise site supports the deployment of secure microcontrollers The site has fully featured smartcard manufacturing lines and the capability to personalize secure ICs through dedicated SW development and services Secure software and personalization services Muar: Muar is an advanced back-end manufacturing facility specializing in high-complexity and high-reliability packages A major portion of the production volume is dedicated to automotive products and the site is a leader in automotive product engineering and test development Norrköpping: Norrköpping is a center of excellence for Silicon Carbide (SiC) substrate technology and manufacturing It is the pilot line for the manufacturing of conductive and semi-insulating SiC substrates and epitaxial layers Rennes: ST serves the complete needs of space and aerospace customers for plastic rad-hardened devices and for ceramic and metallic hermetic packages Rousset: Rousset is a fully integrated facility that includes manufacturing The site includes a 200 mm wafer manufacturing plant for standard and secure microcontrollers and an electrical test center for 200 mm and 300 mm wafers from various ST manufacturing plants and subcontractors Shenzhen: Shenzhen plant packages and tests a broad range of semiconductor components including power transistors Singapore: Singapore is one of our largest front-end manufacturing facilities serving a broad range of applications They also house the largest electrical wafer sorting (EWS) operations as well as packaging research and development activities This new R&D line looks to advance Piezoelectric MEMS technologies to boost innovation and accelerate development of new materials Tours: Tours designs and manufactures components on silicon and glass substrates targeting a wide variety of electronic applications ST is focusing on sustainability to reach carbon neutrality by 2027 on the company level ST creates technology for a sustainable world by prioritizing people thus protecting the planet thus generating long-term value for all stakeholders ST has achieved quite a lot of results in terms of water consumption electricity consumption and water recycled rate ST’s EHS team focusing on manufacturing sites energy management from health safety All the sites worked on 53 energy management improvement projects ST is trying to reduce carbon footprint in Singapore ST adopted a district cooling system at ST’s single largest wafer-fabrication site by volume globally It eliminated up to 120,000 tons of carbon from the environment which is equivalent to 30% of ST Singapore’s carbon emissions in 2021 Water Management: Manufacturing sites produce ultra-clean water and continuously improve wastewater treatments and water discharge quality in order to reduce carbon footprint of all these sites ST targets to work with customers and partners to strive for zero waste while promoting a circular economy ST is investing in the areas of digital transformation and Industry 4.0 ST is leveraging digital technologies to reduce waste to strengthen supply chain and product life cycle management ST connects and digitalizes products related to information and processes for a more efficient and effective innovation engine It leverages the digital technologies to analyze manufacturing data to industrialize ST’s manufacturing data and analytics capabilities automated processes 95% of the dispatching is automated ST is digitalizing the semiconductor factory floor: Industrializing manufacturing data & analytics capabilities contributing to improving manufacturing quality ST uses the latest Industry 4.0 Technologies such as mixed reality for remote maintenance autonomous intelligent vehicles to enhance the automation of the entire factory ST is leveraging digital twins technologies especially for the 300 mm fabs at Crolles and Agrate The Importance of Embracing Technology in Manufacturing In response to a question with ELE Times as ‘What is the importance of embracing technology in manufacturing for ST How has the use of technology changed over the years for semiconductor players “Technology is evolving at an astonishing pace changing the way we live and the way we do business need to prioritize technology in order to effectively compete resulting in lower production costs and increased profitability semiconductor players rely heavily on advanced manufacturing technologies such as lithography and plasma etching to create ever-smaller and more complex devices Advancements in technology are enabling manufacturers to streamline production processes reduce costs and deliver higher quality products to meet customer demand Because of its versatility and ease of use there are a number of areas within manufacturing where technology is being harnessed by ST we are able to save money and improve our value proposition to customers and potential customers differentiating the unique products we offer in the market ST has been incorporating such technologies for years mastering the semiconductor supply chain with state-of-the-art manufacturing facilities We also use data analytics and artificial intelligence to monitor and optimize the production processes ensuring that they are operating at peak efficiency and quality more efficient power and energy management and the wide-scale deployment of the Internet of Things and connectivity IoT sensors can be used to monitor equipment and machines and alert operators to any issues that arise This technology is an example of what we at ST have embraced and are perfecting for manufacturing” ELE Times provides a comprehensive global coverage of Electronics In addition to providing in depth articles With its 1.5kg/1.5 liters/15Watts challenging SWaP-C constraints, it is suited for air and terrestrial harsh environments missions. It offers dual and quad-core System-on-Chip (SoC) for performance and quad-core E39x0 Apollo Lake for lower power requirements The ONYX products read-copy-update (RCU) family has shrunk in the past seven years in terms of SWaP constraints to 1.5kg/1.5 liters/15Watts announced with ECRIN's latest nano-ONYX UAV targeting RCU Nano-ONYX was specially made for rotary wings and fixed wings aircraft, UAVs It is also suitable for other extreme environments like ground vehicles The Nano-ONYX will be demonstrated for the first time at PARIS Air Show in June 2019 Search the Intelligent Aerospace Buyer's Guide for companies STMicroelectronics is working with the French universities to create a high-reliability semiconductor research laboratory The Radiation Effects and Electrical Reliability (REER) Joint Laboratory is a multi-site research establishment that will bring together teams from the IM2NP Institute and specialist engineers from the ST facility in Crolles The REER Joint Laboratory’s research will focus on two main areas of research: the effect of radiation on the 28nm technology node and beyond in particular the FD-SOI (fully depleted silicon-on-insulator) industrial cluster developed by ST at its Crolles site such as the space but also high growth sectors like automotive the intrinsic constraints of electronic components (electrical fields etc.) and some environmental constraints (especially particle radiation from natural or artificial sources) are becoming an increasingly critical issue for current and future generations of integrated circuits,” said the group The lab will also be involved with collaborative programmes and projects at the national in conjunction with the European CATRENE cluster the ENIAC initiative and support programs led by the French General Directorate for Enterprises (DGE) and the French defense procurement agency (DGA) Tagged with: